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version 1.9 total pages 27 date 2009.01.20 product specification color tft-lcd module model name: a080sn01 v0 (97.08a07.000) no te : the c o nt e nt of t h is spec if ica t io n is su bje ct t o cha n ge . ? 2 00 9 au o ptr o nics al l r i gh ts res er v e d , d o n ot c op y. ( ) preliminary specification ( .. ) final specification www.datasheet.co.kr datasheet pdf - http://www..net/
record of revision version revise date p a g e content 0.0 14/mar/2007 first draft. 0.1 16/mar/2007 6 revise min. operation and storage temperature 7 add min and max led lightbar voltage 16 add brightness condition, v=12v 0.2 28/mar/2007 20~22 add suggested application circuit 23~24 revise outline drawing - f p c l e n g t h : f r o m 3 0 . 3 m m t o 4 5 m m - s u g g e s t e d f p c c o n n e c t o r : x f 2 m - 6 0 1 5 - 1 a h 0.3 14/may/2007 6 update min. & max. vcom value 16 update white chromaticity 23-24 update outline drawing 0.4 25/may/2007 6 update av dd , v gh , v gl , vcom value 12 update register description 15 update recommended power on register setting 21 updata suggested application circuit 24 revise outline drawing - update fpc connector: x f 2 m - 6 0 1 5 - 1 a h 0.5 1/jun/2007 7 update the figure of led series/parallel connection 0.6 13/jul/2007 4 modify pin#35 & #37 of fpc 6 remove dc/dc converter section 6 add power consumption 21~23 update suggested application circuit 0.7 24/jul/2007 12 modify serial register table(default value): r4/d8: 1 0.8 21/aug/2007 8 modify dclk frequency o f h o r i z o n t a l t i m i n g 12 update serial register table(default value): r0/d3: 0 23 modify application circuit: vcom => vcomin 0.9 27/aug/2007 25 update outline drawing C back side 1.0 13/dec/2007 16~17 add vgh, vgl power on/off sequence 1.1 24/jan/2008 25 update outline drawing C front side www.datasheet.co.kr datasheet pdf - http://www..net/
1.2 2008/04/15 27 add suggestion- system block 1.3 2008/05/06 3 add total power consumption 6 update electrical characteristics 1.4 2008/07/08 7 remove led lightbar voltage min value 15 add note on r e c o m m e n d e d p o w e r o n r e g i s t e r s e t t i n g 1.5 2008/07/29 15 update note on r e c o m m e n d e d p o w e r o n r e g i s t e r 1.6 2008/11/06 18 update viewing angle 25 update drawing fpc connector 26 update bar code label size to 83*9mm 1.7 2008/11/12 18 update response time 1.8 2009/01/07 12 update serial register table 13 delete r 1 s e t t i n g 1.9 2009/01/20 5 update pin35,37 12 update serial register table 15 delete notes www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 1 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. contents: a. physical specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p3 b. electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p4 1. pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p4 a. tft-lcd panel driving section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p4 b. backlight driving section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p5 2. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p6 3. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p6 a. typical operating conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p6 b. backlight driving conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p7 4. ac timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p7 5. rgb parallel input timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p8 a. horizontal timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p8 b. vertical timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p9 6. serial control interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p10 7. register back . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p11 8. serial register table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p12 9. register description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p12 10. power sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p16 c. optical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p18 d. reliability test items . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p20 e. packing form . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p21 f. suggested application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . p22 g. sugg estio n- s y s t em b lock p27 www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 2 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. appendix: fig.1-(a) outline dimension of tft-lcd module(front si de) . . . . . . . . . . . . . . . . . . . . . . . . . p25 fig.1-(b) outline dimension of tft-lcd module(back side) . . . . . . . . . . . . . . . . . . . . . . . . . p26 www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 3 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. a. physical specifications no. item specification remark 1 display resolution (dot) 800rgb(w)x600(h) 2 active area (mm) 162(w)x121.5(h) 3 dot pitch (mm) 0.2025(w)x0.2025(h) 4 color configuration r. g. b. stripe note 1 5 overall dimension (mm) 183(w)x141(h)x6.3(d) note 2 6 weight (g) 235 10 7 surface treatment anti-glare 8 backlight unit 24 pcs of led 9 total power consumption (watt) 2.3 w max (include l ogic and blu power) note 1: below figure shows the dot stripe arrangement. note 2: refer to fig. 1 r g b r g b r g b r g b r g b . . ( 1 2 3. .. . 2398 2399 2400 ) ( 1 ... ..600 ) www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 4 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. b. electrical specifications 1.pin assignment a. tft-lcd panel driving section pin no symbol i/o description remark 1 agnd p analog ground 2 avdd p analog power 3 vcc p digital power 4 r0 i data input (lsb) 5 r1 i data input 6 r2 i data input 7 r3 i data input 8 r4 i data input 9 r5 i data input 10 r6 i data input 11 r7 i data input (msb) 12 g0 i data input (lsb) 13 g1 i data input 14 g2 i data input 15 g3 i data input 16 g4 i data input 17 g5 i data input 18 g6 i data input 19 g7 i data input (msb) 20 b0 i data input (lsb) 21 b1 i data input 22 b2 i data input 23 b3 i data input 24 b4 i data input 25 b5 i data input 26 b6 i data input 27 b7 i data input (msb) 28 dclk i clock input 29 de i data enable signal 30 hsync i horizontal sync input. negative polarity 31 vsync i vertical sync input. negative polarity 32 scl i serial communication clock input 33 sda i serial communication data input www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 5 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 34 csb i serial communication chip select 35 nc - for test, do not connect (please leave it open) 36 vcc p digital power 37 nc - for test, do not connect (please leave it open) 38 gnd p digital ground 39 agnd p analog ground 40 avdd p analog power 41 vcomin i for external vcom dc input (optional) 42 dith i dithering setting dith = "l" 6bit resolution(last 2 bits of input data turncated) dith = "h" 8bit resolution(default setting) 43 nc - not connect 44 vcom o connect a capacitor 45 v10 p gamma correction voltage reference 46 v9 p gamma correction voltage reference 47 v8 p gamma correction voltage reference 48 v7 p gamma correction voltage reference 49 v6 p gamma correction voltage reference 50 v5 p gamma correction voltage reference 51 v4 p gamma correction voltage reference 52 v3 p gamma correction voltage reference 53 v2 p gamma correction voltage reference 54 v1 p gamma correction voltage reference 55 nc - not connect 56 vgh p positive power for tft 57 vcc p digital power 58 vgl p negative power for tft 59 gnd p digital ground 60 cap c connected to a capacitor i: input; p: power; g: ground; c: capacitor b. backlight driving section (refer to figure 1) no. symbol i/o description remark 1 hi i power supply for backlight unit (high voltag e) -- 2 gnd - ground for backlight unit -- www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 6 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 2. absolute maximum ratings item symbol condition min. max. unit remark v cc gnd=0 -0.5 5 v av dd agnd=0 -0.5 15 v v gh -0.3 42 v v gl gnd=0 -20 0.3 v power voltage v gh v gl - 40 v v i -0.3 v cc +0.3 v note 1 input signal voltage vcom 0 6.5 v opera ting temperature topa -10 60 storage temperature tstg -20 70 note 1: hs , vs , de , digital data 3. electrical characteristics a. typical operating conditions (gnd=avss=0v, note 2) item symbol min. typ. max. unit remark v cc 2.7 3.3 3.6 v i vcc - 11 14 ma black pattern@v cc =3.3 av dd 11 11.68 12 v i avdd - 16 20 ma black pattern v gh 7 15 vee+40 v i vgh - 0.16 0.2 ma black pattern v gl -20 -6.75 -5 v power supply i vgl - 0.16 0.2 ma black pattern power consumption p - 230 260 mw black pattern vcom v cdc 3.9 4.1 4.3 v dc component h level v ih 0.7 v cc - v cc v input signal voltage l level v il 0 - 0.3 v cc v note 1 input level of v1~v7 vx vcomdc - avdd-0.5 positive gamma correction voltage input level of v8~v14 vx 0.5 - vcomdc negative gamma correction voltage note 1: hs , vs , de, digital data www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 7 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. b. backlight driving conditions parameter symbol min. typ. max. unit remark led lightbar voltage v l - 12 12 v note 1, 2 led lightbar current i l - 160 ma note 1, 2 led lightbar life time 10,000 - - hr note 1, 2, 3, 4 note 1: led backlight is led lightbar type(24 pcs of led). note 2: definition of led lifetime: brightness is decreased to 50% of the initial value. led lifetime is restricted under normal condition, ambient temperature = 25 and led lightbar voltage = 12v + - r led led led r led led led led led led r led #1 led #2 led #8 note 3: the value is only for reference. note 4: if it operates with led lightbar voltage mo re than 12v, it maybe decreases led lifetime. 4. ac timing parameter symbol min. typ. max. unit. remark clock high time t wcl 8 - - ns clock low time t wch 8 - - ns hsync setup time t hsu 5 - - ns hsync hold time t hhd 10 - - ns vsync setup time t vsu 0 - - ns vsync hold time t vhd 2 - - ns data setup time t dsu 5 - - ns data hold time t dhd 10 - - ns data enable set-up time t esu 4 - - ns data enable hold time t ehd 2 - - ns input timing details www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 8 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 5. rgb parallel input timing a. horizontal timing parameter symbol min. typ. max. unit. remark dclk frequency f dclk 25 40 45 mhz dclk period t dclk 22 25 40 ns hsync period (= t hd + t hbl ) t h 986 1056 1183 dclk active area t hd - 800 - dclk horizontal blanking (= t hf + t he ) t hbl 186 256 383 dclk hsync front porch t hf - 40 - dclk delay from hsync to 1 st data input (= t hw + t hb ) t he 88 216 343 dclk function of hdl[7..0] settings hsync pulse width t hw 1 128 136 dclk hsync back porch t hb 10 88 342 dclk horizontal input timing (hv mode) horizontal input timing (de mode) www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 9 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. b. vertical timing parameter symbol min. typ. max. unit. remark vsync period (= t vd + t vbl ) t v 620 628 635 th active lines t vd - 600 - vertical blanking (= t vf + t ve ) t vbl 20 28 35 th vsync front porch t vf - 1 - th gd start pulse delay t ve 19 27 34 hs function of vdl[3..0] settings vsync pulse width t vw 1 3 16 th hsync/vsync phase shift t vpd 2 320 - dclk vertical timing (hv mode) vertical timing (de mode) www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 10 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 6. serial control interface parameter symbol min. typ. max. unit. remark serial data setup time t ist 120 - - ns serial data hold time t ihd 120 - - ns csb setup time t cst 120 - - ns csb hold time t chd 120 - - ns serial clock high/low t ssw 120 - - ns serial clock t sck 320 - - ns delay from csb to vsync t cv 1 - - us chip select distinguish t cd 1 - - us serial data output delay t id - - 60 ns cl=20pf ac serial interface write mod e timings ac serial interface read mode timings www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 11 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 7. register bank there is a total of 6 registers each containing several paramet ers. for a detailed description of the parameters refer to register table. the serial register has read/write funct ion. d[15:12] are the register address, d[11] defines the read or write mode and d[10:0] are the data. serial interface write sequence serial interface read sequence 1. at power-on, the default values specified for each paramet er are taken. 2. if less than 16-bit data are read during the cs low time period, the data is cancelled. a. the write operation is cancelled. b. the read operation is interrupt. 3. if more than 16-bit data are read during the cs low ti me period, the last 16 bits are kept. a. address & r/w are always defined form csb falling edge. b. the write operation load last 11 bit data before csb ri sing edge. c. the read operation is d0 is output to sda until csb rising edge. 4. all items are set at the falling edge of the vertical sync, except r0[1:0]. 5. when grb is activated through the serial interface, all registers are cleared, except the grb value. 6. register r/w setting: d11 = l write mode; d11 = h read mode. 7. the register setting values are valid when vcc already go es to high and after vsync starts. 8. it is suggested that vsync, hsync, dclk always exists in the same time. but if hsync, dclk stops, only vsync operating, the register setting is still valid. www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 12 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 9. if the chip goes to standby mode, the register value wil l still keep. mcu can wake up the chip only by changing standby mode value from low to high. 10. the register setting values are rewritten by the influence of static electricity, a noise, etc. to unsuitable value, incorrect operating may occur. it is suggested that the spi interfa ce will setup as frequently as possible. 8. serial register table(default value) reg address r/w data no. d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 0 (01) (01) (1) u/d (0) shl (1) (1) (0) grb (1) stb (1) r1 0 0 0 1 0 (0) (1) (01) (2fh) r2 0 0 1 0 0 hdl (80h) r3 0 0 1 1 0 (0) (0) (0) (0) (0) vdl (1000) r4 0 1 0 0 0 (0) (0) (0) (0) (1) (1111) r6 0 1 1 0 0 (0) engb12 (1) engb11 (1) engb10 (1) (0) (0) engb5 (1) engb4 (1) engb3 (1) (0) x: reserved. please set to 0. 9. register description a. r0 setting address bit description default 0000 [10..0] bits 10-9 auo internal use 01 bits7-8 auo internal use 01 bit6 (dith) dithering function. 1 bit5 (u/d) vertical shift direction selection. 0 bit4 (shl) horizontal shift direction selection. 1 bit3 (shdb1) avdd dc-dc converter shutdown setting. 1 bit2 auo internal use 0 bit1 (grb) global reset. 1 bit0 (stb) standby mode setting. 1 bit6 dith function 0 dith off. 1 dith on. (default) bit5 u/d function 0 scan down; first line= gn -> gn-1 -> -> g2 -> l ast line=g0. (default) 1 scan up; first line= g0 -> g2 -> -> gn-1 -> las t line=gn bit4 shl function 0 shift left; first data= y600 -> y599 -> -> y2 - > last data=y1. 1 shift right; first data= y1 -> y2 -> -> y599 -> last data=y600. (default) www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 13 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. bit3 shdb1 function 0 avdd dc-dc converter is off. 1 avdd dc-dc converter is on. (default) bit1 grb function 0 the controller is reset. reset all registers to de fault value. 1 normal operation. (default) bit0 stb function 0 t-con, source driver and dc-dcs converters are off . all outputs are set to gnd. 1 normal operation. (default) b. r2 setting address bit description default 0010 [7..0] bit7-0(hdl) horizontal start pulse adjustment function 80h bit7-0 hdl function 00h t he = t hetyp - 128 clk period. 80h t he = t hetyp . (default) ffh t he = t hetyp + 127 clk period. c. r3 setting address bit description default 0011 [8..0] bit8 auo internal use 0 bit7 auo internal use 0 bit6 auo internal use 0 bit5 auo internal use 0 bit4 auo internal use 0 bit3-0(vdl) vertical start pulse adjustment function 1000 bit3-0 vdl function 0000 t ve = t vetyp C 8 hs period. 0001 t ve = t vetyp C 7 hs period. 0010 t ve = t vetyp C 6 hs period. 0011 t ve = t vetyp C 5 hs period. 0100 t ve = t vetyp C 4 hs period. 0101 t ve = t vetyp C 3 hs period. 0110 t ve = t vetyp C 2 hs period. 0111 t ve = t vetyp C 1 hs period. 1000 t ve = t vetyp. (default) 1001 t ve = t vetyp C 1 hs period. www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 14 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 1010 t ve = t vetyp C 2 hs period. 1011 t ve = t vetyp C 3 hs period. 1100 t ve = t vetyp C 4 hs period. 1101 t ve = t vetyp C 5 hs period. 1110 t ve = t vetyp C 6 hs period. 1111 t ve = t vetyp C 7 hs period. d. r6 setting address bit description default 0110 [9..0] bits9 auo internal use 0 bits8(engb12) gamma buffer enable for v9 1 bits7(engb11) gamma buffer enable for v8 1 bits6(engb10) gamma buffer enable for v7 1 bits5 auo internal use 0 bits4 auo internal use 0 bits3(engb5) gamma buffer enable for v4 1 bits2(engb4) gamma buffer enable for v3 1 bits1(engb3) gamma buffer enable for v2 1 bits0 auo internal use 0 bitx engbx function 0 gamma buffer for vx is disabled (high z). 1 gamma buffer is enabled. vx must be connected externally. www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 15 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. recommended power on register setting address r/w data reg no . d15 d14 d13 d12 d11 d10 d9 d8 d7 d6 d5 d4 d3 d2 d1 d0 r0 0 0 0 0 0 10 01 1 0 1 0 0 1 1 r1 0 0 0 1 0 0 01 01 2fh r2 0 0 1 0 0 0 0 0 80h r3 0 0 1 1 0 0 0 0 0 0 0 0 1000 r4 0 1 0 0 0 0 0 1 1 00 1 1111 r6 0 1 1 0 0 0 0 1 1 1 0 0 1 1 1 0 . www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 16 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. 10. power sequence sequence for power on/off and signal on/off a. power on sequence www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 17 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. b. power off sequence vcc gnd vcc 90% 0% led gnd vled 90% 0% avdd vgl vgh gnd gnd gnd avdd vgl vgh vcc 90% 0% serial interface > 10us 0% 100% vsync digital input gnd vcc vcc gnd gnd > 0us >80ms 90% 90% 90% 0% 0% 0% 0% 90% > 0us www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 18 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. c. optical specification (note 1, note 2) item symbol condition min. typ. max. unit remark response time rise fall tr tf =0 - - 4 16 8 32 ms ms note 3,5 contrast ratio cr at optimized viewing angle 300 400 - note 4, 5 viewing angle top bottom left right cr R 10 40 55 60 60 50 65 70 70 - - - - deg . note 5, 6 brightness y l v l = 12v 150 200 - cd/m 2 note 7 x =0 0.26 0.31 0.36 white chromaticity y =0 0.28 0.33 0.38 note 7 note 1 : to be measured in the dark room. ambient temp erature =25 , and led lightbar voltage v l = 12v. note 2 :to be measured on the center area of panel wi th a viewing cone of 1 by topcon luminance meter bm-5a, after 15 minutes operation. note 3. definition of response time: the output signals of photo detector are measured whe n the input signals are changed from black to white(falling time) and from white to black(rising time), respectively. the response time is defined as the time interval be tween the 10% and 90% of amplitudes. refer to figure as below. note 4. definition of contrast ratio: contrast ratio is calculated with the following for mula. contrast ratio (cr)= s i g n a l ( r e l a t i v e v a l u e ) "black" tr tf "white" "white" 0% 10% 90% 100% photo detector output when lcd is at white state photo detector output when lcd is at black state www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 19 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. note 5. white vi=v i50 1.5v black vi=v i50 2.0v means that the analog input signal swings in phase with v com signal. means that the analog input signal swings out of phase with v com signal. v i50 : the analog input voltage when transmission is 50% the 100% transmission is defined as the transmissio n of lcd panel when all the input terminals of module are electrically opened. note 6. definition of viewing angle, refer to figur e as below. note 7. measured at the center area of the panel whe n all the input terminals of lcd panel are electrica lly opened. www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 20 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. d. reliability test conditions (note 2): no. test items conditions remark 1 high temperature storage ta= 70 240hrs 2 low temperature storage ta= -20 240hrs 3 high temperature operation tp= 60 240hrs 4 low temperature operation ta= -10 240hrs 5 high temperature and high humidity tp= 50 , 80% rh 240hrs operation 6 heat shock -10 ~60 / 100 cycles 1hrs/cycle non-operation 7 electrostatic discharge 200v,200pf(0 ), once for each terminal non-operation frequency range : 10~55hz stoke : 1.5mm sweep : 10 ~ 55 ~ 10hz 2 hours for each direction of x,y,z 8 vibration (6 hours for total) jis c7021, a-10 condition a 9 mechanical shock 100g, 6ms, x, y, z 3 times for each direction jis c7021, a-7 condition c 10 vibration (with carton) random vibration: 0.015g 2 /hz from 5~200hz C6db/octave from 200~500hz iec 68-34 11 drop (with carton) height: 60cm 1 corner, 3 edges, 6 surfaces jis z0202 note1: ta: ambient temperature. note2: tp: panel surface temperature note3: in the standard conditions, there is not dis play function ng issue occurred. all the cosmetic specification is judged before the reliability stre ss. www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 21 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. e. packing form www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 22 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. f. suggested application circuit www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 23 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. avdd v1 v2 v3 v4 v5 v6 v7 v9 v10 v8 r301 2k/1%/0603 r302 0/5%/0603 r303 6.8k/1%/0603 r304 0/5%/0603 c304 1uf/16v/x5r/0603 c303 1uf/16v/x5r/0603 c305 1uf/16v/x5r/0603 c306 1uf/16v/x5r/0603 c307 1uf/16v/x5r/0603 c308 1uf/16v/x5r/0603 c302 0.1uf/16v/x5r/0402 c309 1uf/16v/x5r/0603 c301 10uf/16v/x5r/1206 c310 1uf/16v/x5r/0603 r306 0/5%/0603 r305 1.43kk/1%/0603 r308 0/5%/0603 r307 1k/1%/0603 c311 1uf/16v/x5r/0603 r310 0/5%/0603 r309 2.2k/1%/0603 r312 0/5%/0603 c322 1uf/16v/x5r/0603 r311 6.8k/1%/0603 r322 0/5%/0603 r321 1.54k/5%/0603 r320 0/5%/0603 r319 3.74k/1%/0603 r318 0/5%/0603 r317 1.5k/1%/0603 r316 0/5%/0603 r315 1.1k/1%/0603 r314 0/5%/0603 r313 2k/1%/0603 10.84 8.21 7.65 7.26 6.42 3.81 3.04 2.61 2.04 0.60 www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 24 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. vcomin avdd avdd r325 0/5%/0603 + - u301a no(ad8565) 3 4 2 5 1 vr301 30kvr c324 10uf/10v/x5r/k/0805 c323 0.1uf/16v/x5r/k/0402 r323 40k/5%/0603 r324 30k/5%/0603 www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 25 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. fig.1-(a) outline dimension of tft-lcd module (fron t side) www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 26 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. fig.1-(b) outline dimension of tft-lcd module (back side) www.datasheet.co.kr datasheet pdf - http://www..net/
model : a080sn01 v0 version :1.9 page : 27 /27 all rights strictly reserved. any portion of this p aper shall not be reproduced, copied, or transformed to any other forms without permissio n from au optronics corp. g. suggestion- system block www.datasheet.co.kr datasheet pdf - http://www..net/

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